FMECAA Failure Mode, Effects, and Criticality Analysis (FMECA) uses an inductive approach to system design and reliability. It identifies each potential failure within a system or manufacturing process and uses severity classifications to show the potential hazards associated with these failures. FMECA began with the standard developed by the United States Military, MIL-STD-1629, Procedures for Performing a Failure Mode, Effects and Criticality Analysis. This procedure was developed as a reliability technique to determine the effect of system and equipment failures. ISO 9000, and IEC 61508 methodologies are other and more modern approaches to performing this kind of analysis. There are two popular approaches to performing a FMECA:
A FMECA is usually applied in two steps:
FMECA can be performed at any stage of system design. The results from a FMECA are maximized if the analysis is implemented during the early development stages and updated throughout the development. This approach also helps to educate system engineers about the system. Performing FMECA near the end of the design process minimizes the influence on the system design. FMECAs can take many forms, but at the core, these analyses are used to study a particular system and determine how that system can be modified to improve overall reliability and to avoid failures. For example, consider a simple FMECA that contains a computer monitor which has a capacitor as a component. By analyzing the circuit design, you determine that if that capacitor was open (one failure mode), the display would appear with wavy lines (the failure effect). If the capacitor was shorted (a second failure mode), the monitor would go blank. The second failure would be ranked as more critical than the first because the monitor becomes completely unusable. Once FMECA has identified failures, you can explore ways to prevent the failure or to lessen their criticality. Design and Process FMEAs can also be constructed if the analysis is centered around a process or other non-hardware system under consideration.
|
|||
|